Micro-ring Resonator Based Digital Photonic Logic Device and Circuit Design for Future Computers / Law Foo Kui

A thesis submitted to the Universiti Teknologi Brunei in partial fulfillment for the requirements for the degree of Doctor of Philosophy (PhD) in Electrical and Electronic Engineering.

Abstract

This research project investigates the possibility of implementing a silicon photonic device into a digital integrated circuit, which is currently dominated with electronic-based interconnects. The existence of multi-core processors amongst CPUs designed by high profile companies such as Intel shows the current technological limitation growth for a single-core processor due to its electrical interconnects. Alternative designs, such as optical interconnect-based circuits are required for further technological improvements. This project focuses on providing an alternative core design can be considered as one of the many approaches towards the development of a hybrid electrical-optical future computers.

The novelty of this work is the construction of the digital photonics logic gates which utilizes a single silicon micro-ring resonator structure based on several forms of a simulation experiment. It starts with the construction of the ring waveguide in the form of PIN-diode doped silicon with its core dimension made to be in 400nm x 220nm, following existing structural design work. Simulation has been carried out on the customized ring waveguide structure, with a linear change of 400pm/V when the voltage is in the range of 0.8V up to 1.4V. The critical coupling region of a micro-ring resonator has also been characterized, with the coupling gap used is 200nm, where a coupling coefficient of 0.105 is found when the ring length is 62µm.

The designed silicon micro-ring resonator with the ring length of 62µm is then used to design and simulate digital photonic logic gates of AND, NAND, OR, NOR, buffer, inverter as well as XOR and XNOR gates. Input optical power applied to the ring was a single wavelength of 1550.3nm at the optical power of 5dBm. Two electrical modulation voltages are applied with each of the input voltage at 1.2V for all of the logic gates. It was then simulated at the data rate of 10Gbps to demonstrate its logic mode operation.

The designed photonic logic gates were then used to be implemented into several combinational as well as sequential logic circuits. All of the photonic logic circuits were then simulated, with the electrical input signal amplitude of 1.2V, at the data rate of 1Gbps, and the simulation data sampling rate of 1.6THz. An upgrade to the photonic D type flip-flop was made where its operating wavelength can be also reconfigured thermally by directly applying specific temperature to its ring resonators within the temperature range of 10°C up to 60°C where the operational wavelength of 1550nm and 1552nm was achieved.

The final work is the development of an early stage of a Photonic Arithmetic Logic Unit (PALU). ALU is the core part of a computer system. A 4-bit ALU was divided into five smaller circuit blocks, each with its defined input as well as its output. Each block was simulated to generate its result at the data rate of 1Gbps, the time window of 6ns, and the data sampling rate of 3.2THz. This proves that the proposed digital photonic logic gates can be used in any digital logic circuits as a replacement.